Design Verification Engineer - Chip Level /IP Level

We are seeking a Design Verification Engineer to join our dynamic team. The ideal candidate will have a strong background in chip-level verification and extensive experience working with standard interfaces such as AMBA, USB, I2C, and UART. This opportunity is available in San Diego, San Jose, or Irvine, CA.

If you want your resume reviewed by the hiring manager and not TA apply now.

We are hiring immediately. Two Online Interviews and an Offer is made !

Opportunity Type: C2C (Corp-to-Corp) or Direct Hire with benefits.

Key Responsibilities:

Develop and execute comprehensive verification plans for complex digital circuits and systems.

Design and implement test benches using SystemVerilog/UVM.

Write and review test cases, simulation scripts, and coverage models.

Collaborate with design engineers to identify and resolve design issues, enhancing verification efficiency.

Participate in design reviews and provide verification-related input.

Requirements:

8+ years of experience in design verification (chip-level

or IP-level).

Strong expertise in:

SystemVerilog/UVM

Verilog/VHDL

AMBA (AHB, APB, etc.)

USB, I2C, UART, and other standard interfaces.

Proficiency in simulation tools such as VCS, QuestaSim,etc.

Excellent debugging and problem-solving skills.

Strong communication and teamwork skills.

Location: San Diego, San Jose, Irvine, CA

Job Type: Full-Time

Opportunity Type: C2C (Corp-to-Corp) or Direct Hire

If you’re passionate about digital verification and working in a collaborative, fast-paced environment, apply now to be part of a team that pushes the boundaries of innovation in the semiconductor industry.